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The original was posted on /r/hardware by /u/Balance- on 2025-01-28 06:11:37+00:00.

Summary: Cerebras has solved the yield problem for wafer-scale chips through an innovative approach to fault tolerance, challenging the conventional wisdom that larger chips inevitably mean worse yields. The company’s Wafer Scale Engine (WSE) achieves this by implementing extremely small AI cores of approximately 0.05mm² (compared to ~6mm² for an Nvidia H100 SM core), combined with a sophisticated routing architecture that can dynamically reconfigure connections between cores to route around defects. This design makes the WSE approximately 100x more fault tolerant than traditional GPUs, as each defect affects only a minimal area of silicon. Using TSMC’s 5nm process with a defect density of ~0.001 per mm², the WSE-3, despite being 50x larger than conventional chips at 46,225mm², achieves 93% silicon utilization with 900,000 active cores out of 970,000 physical cores—a higher utilization rate than leading GPUs, demonstrating the commercial viability of wafer-scale computing.